Characterizing and Predicting Program Behavior and it's Variability

Authors:   Evelyn Duesterwald, Calin Cascaval, Sandhya Dwarkadas (IBM, Rochester)
Venue:      PACT 2003

This paper makes no effort to tune hardware, but shows yet another phase detection and prediction technique. The study is done on real hardware, using IBM Power3 and Power4 architectures. Both of these are extremely outdated, but it makes for an interesting paper nevertheless. They are able to instrument their phase detection techniques on OS interrupts at a granularity of 10ms. At this time, they read various performance counter, analyzing the current hardware state and predicting the future hardware state.

It is not entirely clear how they actually determine a phase, but essentially, they are able to accurately predict different performance metrics such as IPC, branch miss-predict rate, and L1 cache miss rate. They support the use of table-based predictor. They also show that most statistics are extremely correlated, so a predictor for one metric can likely accurately predict another metric. What mainly is interesting in this paper is the ability to change things on-the-fly.

Full Text (note, link is slow)


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