Stripes: Bit-Serial Deep Neural Network Computing

Authors: Patrick Judd, Jorge Albericio, Tayler Hetherington, Tor M. Aamodt, Andreas Moshovos
Venue:    MICRO 2016

Bit-Stripes presents are architecture which is able to scale almost linearly with the bit-precision width for neural networks. They do a design space exploration to find the minimum number of bits required for different networks to maintain within 1% accuracy of the original network. The paper takes a DaDianNao-like approach in terms of hardware, but thanks to the per-layer precision optimizations consumes less energy, and operates faster.

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