Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management

Authors: Canturk Isci, Gilberto Contreras, and Margaret Martonosi
Venue:   MICRO 2006

The authors of this paper present a real-system framework which enables phase detection, phase prediction, and system reconfiguration. The phase detection is done using performance counters, more specifically, phases are classified based on their ratio of memory bus transitions to micro-ops retired. This is mapped to how compute vs. memory bound an application is, and thus, the DVFS can be adjusted accordingly. Phase prediction is done in a similar fashion to the TAGE branch predictor, using a global history table which tracks 1024 entries and a history of 8. The framework achieves an 18% EDP improvement with a 4% performance loss on average across SPEC 2000 benchmarks. Note that their phase detection framework and performance counter selection is geared specifically toward DVFS optimization, and is justified through analysis in the paper which demonstrates a specific relationship present.

Key contributions:
- Bridge the gap between phase detection and dynamic hardware via DVFS
- Show that a global history table phase predictor works well

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