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Showing posts with the label HPC

A Case for Machine Learning to Optimize Multicore Performance

Authors: Archana Ganapathi, Kaushik Datta, Armando Fox, David Patterson Venue: USENIX Hot Topics in Parallelism 2009 This workshop paper examines applying a machine learning technique to auto-tuning HPC stencils. The configuration space consists of 5 independent knobs resulting in a total of ~4 million possible configurations. The work applies KCCA (kernel canonical correlation analysis) which finds correlations between two sets of data, in this case performance measurements and tune settings. KCCA is a specific way to do this that allows for non-linear relationships. Compared to feature extraction techniques, this is a direct way to find correlations rather than just using an intermediate step of feature extraction followed by a method of clustering. The main reason this appears to be only a workshop paper is that only two experiments are performed, both using stencils. The KCCA algorithm is definitely worth a deeper understanding, as the results are promising. Full Text

PADDLE: Performance Analysis using a Data-Driven Learning Environment

Authors: Jayaraman Thiagarajan, Rushil Anirdh, Bhavya Kaikhura, Nikhil Jain, Tanzima Islam, Abhinav Bhatele, Jae-Seung Yeom, Todd Gamblin Venue: I EEE International Parallel and Distributed Processing Symposium (IPDPS) In the scope of HPC, machine learning is gaining increased traction to add in performance analysis and tuning. However, this approach includes a pipeline of data collection, data pre-processing, various machine learning algorithm testing, tuning, and then finally trying to understand the model. The paper states that while this process is repetitive, rarely can insights be reused from one domain to another. To address this void, the propose PADDLE. PADDLE has three key steps: deep feature extraction, model design, and visualization. The first step allows users to throw extensive amounts of data at the problem, and an automated solutions determines the key inputs, mapping them to a new feature space. The next step in paddle automatically tests a number of machine lea...