Managing Multi-Configuration Hardware via Dynamic Working Set Analysis

Authors:      Ashutosh S. Dhodapkar and James E. Smith (U. Wisconsin - Madison)
Venue:         ISCA 2002

This paper is one of the first to propose working set signatures to detect and recall program phases. This eliminates the need for re-training phases, and can also be used to predict features like proper cache size. The signature is generated by hashing each branches into an N-bit vector. The vector is unweighted meaning that, it simply encapsulates whether or not the hash of a branch was seen. They use 128 byte vectors for 100K instruction windows (fine grain). This paper should mainly be seen as a building block, as it is some of the earlier work in phase detection. Key issues are: too frequently sampling (every branch committed), too frequent changes (100K instructions, doesn't account for cost of context switch), and targeted reconfiguration (instruction cache size -- typical programs now multiple MB).
  • This paper has good information about average phase length for Spec2000 programs. 
  • This paper has an excellent explanation of Rajeev's algorithm from "Memory Hierarchy Reconfiguration for Energy and Performance in General Purpose Architectures".

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