Long Term Parking (LTP): Critically-aware Resource Allocation in OOO Processors

Authors: Andreas Sembrant, Trevor Carlson, Erik Hagersten, David Black-Shaffer, Arthur Perais, Andre Seznec, and Pierre Michaud
Venue:    MICRO 2015

The authors of this paper explore the utility of large instruction queues, load-store queues, register files, and other processor structures. These resources significantly boost performance by leveraging ILP and MLP. However, when resources are allocated to instructions that are not yet ready to be executed, it wastes significant energy. The authors spend significant effort to determine that a IQ of half-size (64->32), with a "Long Term Parking" structure for non-ready and non-urgent instructions, has negligible impacts on performance. Furthermore, the authors find that a majority of this benefit can be acquired via non-urgent instructions only. The authors then propose a solution to leverage this benefit, and find a design which is 1% slower, but 40% lower E(D^2)P for MLP-sensitive applications, and 3% slower but 38% lower E(D^2)P for MLP-insensitive applications.

Note: I did not fully read the paper as it is a bit out of my depth.

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